JPH0330170B2 - - Google Patents
Info
- Publication number
- JPH0330170B2 JPH0330170B2 JP60178097A JP17809785A JPH0330170B2 JP H0330170 B2 JPH0330170 B2 JP H0330170B2 JP 60178097 A JP60178097 A JP 60178097A JP 17809785 A JP17809785 A JP 17809785A JP H0330170 B2 JPH0330170 B2 JP H0330170B2
- Authority
- JP
- Japan
- Prior art keywords
- guard
- subtraction
- digit
- mantissa
- protection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60178097A JPS6238937A (ja) | 1985-08-13 | 1985-08-13 | 浮動小数点演算における保護桁処理方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60178097A JPS6238937A (ja) | 1985-08-13 | 1985-08-13 | 浮動小数点演算における保護桁処理方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6238937A JPS6238937A (ja) | 1987-02-19 |
JPH0330170B2 true JPH0330170B2 (en]) | 1991-04-26 |
Family
ID=16042588
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60178097A Granted JPS6238937A (ja) | 1985-08-13 | 1985-08-13 | 浮動小数点演算における保護桁処理方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6238937A (en]) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63298435A (ja) * | 1987-05-28 | 1988-12-06 | Matsushita Electric Ind Co Ltd | 浮動小数点演算装置 |
JP2537876B2 (ja) * | 1987-06-11 | 1996-09-25 | 松下電器産業株式会社 | 丸め処理回路 |
US8909690B2 (en) | 2011-12-13 | 2014-12-09 | International Business Machines Corporation | Performing arithmetic operations using both large and small floating point values |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4338675A (en) * | 1980-02-13 | 1982-07-06 | Intel Corporation | Numeric data processor |
JPS58225436A (ja) * | 1982-06-25 | 1983-12-27 | Panafacom Ltd | まるめ処理制御方式 |
-
1985
- 1985-08-13 JP JP60178097A patent/JPS6238937A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6238937A (ja) | 1987-02-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0097956B1 (en) | Arithmetic system having pipeline structure arithmetic means | |
US5197023A (en) | Hardware arrangement for floating-point addition and subtraction | |
US5530663A (en) | Floating point unit for calculating a compound instruction A+B×C in two cycles | |
CA1324217C (en) | Pipelined floating point adder for digital computer | |
US4199810A (en) | Radiation hardened register file | |
US5426600A (en) | Double precision division circuit and method for digital signal processor | |
JPH0542011B2 (en]) | ||
JPH0470662B2 (en]) | ||
EP0234495B1 (en) | Arithmetic circuit capable of executing floating point operations and fixed point operations | |
US4992969A (en) | Integer division circuit provided with a overflow detector circuit | |
JPH0343645B2 (en]) | ||
JPS6227412B2 (en]) | ||
US5107453A (en) | Data processor capable of executing division of signed data with a small number of program steps | |
JPH0330170B2 (en]) | ||
JPH07107664B2 (ja) | 乗算回路 | |
JPH07146777A (ja) | 演算装置 | |
JPH0772860B2 (ja) | 演算方式 | |
US5689721A (en) | Detecting overflow conditions for negative quotients in nonrestoring two's complement division | |
JPS61224036A (ja) | 演算装置 | |
SU567172A1 (ru) | Устройство дл вычитани чисел с плавающей зап той | |
JP2604667B2 (ja) | 予測機能付き演算装置 | |
JP3139011B2 (ja) | 固定小数点プロセッサ | |
JPS6129020B2 (en]) | ||
JPS6252331B2 (en]) | ||
JPH0644226B2 (ja) | 演算処理装置 |